INSIGHT

Integration of III-V Nanowire Semiconductors for next
Generation High Performance CMOS SOC TECHNOLOGIES

Objectives

The ultimate goal of INSIGHT is to
enhance advanced CMOS RF and logic capability through the use of III-V heterostructure nanowires monolithically integrated on a silicon platform.

In order to achieve this goal, we have identified a set of demonstrator circuits that match the need of end-users within, or associated, with the consortium. We have defined the circuit specifications from which we derive the required technology development and the corresponding technical specifications on the transistor level. Finally, the required advancement of the materials and processes are identified.

The project focuses on the:

  • Development and evaluation of the performance of silicon based, 94 GHz III-V nanowire MOSFET low-noise amplifiers. The technology opens a path for cost reduction of key mm-wave components for high bandwidth wireless applications.
  • Development of III-V nanowire MOSFETs on Si with breakdown voltage of 3-6 V, and evaluation of their performance in millimeter wave (90 GHz) power amplifier circuits. These devices will increase output power available from Si CMOS compatible mm-wave technologies with benefits for transceiver range and sensitivity.
  • Realisation of basic building blocks for future RF-circuits including mixers, Voltage-Controlled Oscillators, and frequency dividers for prescalers using silicon based III-V nanowire MOSFETS.
  • Development of science and technology for all-III-V nanowire CMOS on silicon targeting future technology nodes for 10 nm and below. This will be validated by the implementation and dynamic characterisation of a flip-flop as demonstration of the co-integration of III-V n- and p-type nanowire MOSFETs.
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