INSIGHT

Integration of III-V Nanowire Semiconductors for next
Generation High Performance CMOS SOC TECHNOLOGIES

Event archive

INSIGHT holds winter school in the french alps

Published: 2018-04-11

INSIGHT has organised a winter school in Leux Deus Alpes, France on February 8-9th 2018, open to postgraduate students and researchers interested in the physics and technology of III-V nanowire transistors. The objective of the winter school was to introduce postgraduates and researchers to the state of the art III-V nanowires for digital and RF CMOS applications. The topics covered were:

  • Advanced Si CMOS devices (Maud Vinet, CEA-LETI)
  • Novel materials and device integration (Veeresh Despande, IMEC)
  • The physics of ballistic transport in MOSFETs (Erik Lind, ULUND)
  • Impedance spectroscopy of defects in MOS structures (Paul Hurley, Tyndall)
  • RF Circuits in Si and SiGe: Power amplifiers, LNAs, VCOs and Mixers (Didier Belot, CEA-LETI)
  • III-V RF MMIC Circuits (Christian Friesecke, Fraunhofer IAF)

 



 


5th Consortium meeting was held in Leux des Alpes

Published: 2018-09-07

The fifth consortium meeting was held in Leux des Alps on the 6-7th February 2018 in conjunction with the Winter school which was held in the days after. The meeting brought together the team again after a hectic winter season to plan for the upcoming intermediate review, and to position ourselves to best be able to push our technology ahead in the last year of the project. On the table was in particular the development of the p-type transistor technology, and the establishment of the BEOL technology and its effects on the RF circuit performance.



 


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