INSIGHT

Integration of III-V Nanowire Semiconductors for next
Generation High Performance CMOS SOC TECHNOLOGIES

Event archive

INSIGHT workshop to be held at the European Microwave Week this fall

Published: 2017-06-13

INSIGHT to hold workshop at EuMW 2017

Please visit EuMW's web pages for full details and registration. 

Title of workshop: Integration of III-V Nanowire Semiconductors for Next Generation High Performance CMOS SOC Technologies and Competitive Solutions

Organisers: Lars-Erik Wernersson and Didier Belot

Objective of this workshop is to underline initiatives which aims at exploiting the transistor benefits in the millimetre wave application area. We will focus on key circuits including both LNAs and PAs. Co-integration of III-V technology with Si CMOS as well as all-III-V CMOS technology is considered. In this workshop, we will discuss the benefits of the III-V nanowire technology and compare to other available technologies. We will demonstrate very high performance on the transistor level and present the most promising approaches to exploit the transistor properties at the circuit level. The workshop will start with an overview of the state of art, and initiatives targeting III-V integration in Si technologies, followed by a presentation focusing on trends in RF and mmW applications which are demanding new developments for high performance devices. The workshop will also provide a complete overview from materials, through devices to full circuit design and circuit evaluation. Presentations from “best in class” European researchers active in the area of III-V materials, devices and circuits, will provide a European Perspective on the current state of the art in III-V devices for RF and mmW applications. At the end of the day, a round table discussion will close the workshop, in order to well define which technology can answer to which application.

 

Programme

08:30 - 08:55 Introduction Lars-Erik Wernersson, University of Lund, Sweden

08:55 - 09:20 Application Trends and Technology Needs Sven Mattisson, Ericsson, Sweden

09:20 - 10:10 Material for III-V Nanowires Iain Thayne, University of Glasgow, UK

10:10 - 10:50 Break 10:50 - 11:40 IIII-V Materials and Devices for RF and mm-Wave Research Nadine Collaert, IMEC, Belgium

11:40 - 12:30 Devices and Modeling for RF and mm-Wave Michael Schröter, University of Dresden, Germany

12:30 - 13:50 Break

13:50 - 14:40 Devices and Modeling Erik Lind, University of Lund, Sweden 14:40 - 15:30 III-V CMOS Co-Integration Veeresh Deshpande, IBM, Switzerland

15:30 - 16:10 Break

16:10 - 16:50 III-V and Si Circuits for RF and mm-Wave Herbert Zirath, Chalmers University, Sweden

16:50 - 17:30 III-V CMOS Circuit for RF and mm-Wave Thomas Merkle, Fraunhofer, Germany

17:30 - 17:50 Round Table Discussion and Conclusion
Moderator: Didier Belot, LETI, France

More



 


Page Manager: |